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The nitrogen-vacancy (NV) center in diamond is an increasingly popular quantum sensor for microscopy of electrical current, magnetization, and spins. However, efficient NV–sample integration with a robust, high-quality interface remains an outstanding challenge to realize scalable, high-throughput microscopy. In this work, we characterize a diamond micro-chip (DMC) containing a (111)-oriented NV ensemble and demonstrate its utility for high-resolution quantum microscopy. We perform strain imaging of the DMC and find minimal detrimental strain variation across a field of view of tens of micrometer. We find good ensemble NV spin coherence and optical properties in the DMC, suitable for sensitive magnetometry. We then use the DMC to demonstrate wide-field microscopy of electrical current and show that diffraction-limited quantum microscopy can be achieved. We also demonstrate the deterministic transfer of DMCs with multiple materials of interest for next-generation electronics and spintronics. Lastly, we develop a polymer-based technique for DMC placement. This work establishes the DMC's potential to expand the application of NV quantum microscopy in materials, device, geological, biomedical, and chemical sciences. 

Abstract New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm²V⁻¹s⁻¹, due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm²V^–1s^–1and a subthreshold slope of 0.29 V dec^–1. Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐kgate insulator (ALD Al₂O₃), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.